The present invention relates to the structure of a capacitor element such as might be used for blocking (shunting) or passing a high frequency signal or for constituting a filter in combination with an inductance element and/or a resistor element, in a microwave integrated circuit for use for processing a high frequency signal of from several hundreds MHz to several tens GHz.
With rapid advances in the development of an information network systems, satellite communication systems in a high frequency band are becoming more popular. As a result, a high-frequency field-effect transistor, a Schottky barrier type field-effect transistor (MESFET) using a compound semiconductor such as a GaAs semiconductor or the like is being used more and more. Recently, in order to reduce the size and cost of a system for such communication and in order to improve system performance, a first-stage amplifier portion of a down converter for converting a high-frequency signal into a low-frequency signal has been developed and fabricated into an integrated circuit (MMIC: monolithic microwave integrated circuit). The MMIC provides a communication device replacing one previously constituted by a large number of separate elements. The use of such a MMIC reduces the number of parts needed, the mounting costs, and improves reliability by the reduction in the number of connection points required by the circuit. Compared with prior devices using a large number of separate elements, reduction in cost can be easily achieved by mass production.
A MMIC having numerous capacitor elements in a circuit requires making a complex circuit layout on a plane, thus, making the circuit difficult to produce. In a MMIC to be used at frequencies not lower than about 100 GHz, a distributed constant line element such as a micro strip line, or the like is used, but there is a tendency for the area of the strip line to become large. This tendency becomes significant in a MMIC for use at frequencies lower than 100 GHz. As the size of a MMIC chip becomes large, production yield becomes low and the number of chips which can be obtained from one substrate becomes relatively smaller, thus, increasing the cost per chip. To help overcome this problem, a parallel plate capacitor is used which is constituted by a square-shaped conductor, with each side about several tens .mu.m to about several hundreds .mu.m long, formed in a first wiring layer and another conductor formed in a second wiring layer. An inter-layer insulating film is interposed between the first and second layers so as to form a sandwich shape, that is, a MIM (Metal-Insulation-Metal) capacitor.
In such a MIMC, however, it is typical that only two wiring layers are used, and it is therefore impossible to use a lamination miniaturizing technique which is applied to an individual element capacitor. The only way to reduce size would be to reduce the thickness of the inter-layer insulating film or use material having a specific inductive capacity .epsilon. as the inter-layer insulating film. However, if the thickness of the inter-layer insulating film is too thin, a short circuit may be generated due to flaws in the laminate which lowers the yield, therefore, the thickness is limited to approximately 0.2 .mu.m. Further, only certain materials can be used as the inter-layer insulating film at such thicknesses. Therefore, Si.sub.3 N.sub.4 or SiON having .epsilon.=7 are the preferred materials since they have large specific inductive capacities.